Photovoltaic devices that receive light and convert the energy into electrical power are already known. Solar cells are one known example of these types of photovoltaic devices. Amongst solar cells, thin-film solar cells that use thin-film silicon-based layers as the electric power generation layer (photovoltaic layer) are attracting considerable attention for reasons including the fact that the thickness of the electric power generation layer is minimal, meaning the silicon material costs can be kept to a minimum, and the fact that deposition can be conducted onto large surface area substrates, meaning large surface area products can be obtained.
Examples of these thin-film soar cells include thin-film solar cells that use layers of amorphous silicon (non-crystalline silicon) for the electric power generation layer. FIG. 1 is a schematic cross-sectional view illustrating one example of this type of thin-film solar cell. This thin-film solar cell comprises a substrate 101, a transparent electrode layer 102, a photovoltaic layer 103, and a back electrode layer 104. The photovoltaic layer 103 comprises a p-type amorphous silicon layer, an i-type amorphous silicon layer and an n-type amorphous silicon layer, which are stacked in that order from the side of the transparent electrode layer 102.
When producing the thin-film solar cell illustrated in FIG. 1, the transparent electrode layer 102 is first deposited on the substrate 101. Subsequently, the p-type amorphous silicon layer, i-type amorphous silicon layer and n-type amorphous silicon layer are deposited sequentially as the photovoltaic layer 103 on top of the transparent electrode layer 102. Then, the back electrode layer 104 is deposited on the n-type amorphous silicon layer. The photovoltaic layer 103 is deposited using a vapor-phase epitaxy method such as plasma-enhanced CVD.
However, in the case of a solar cell, the electric power output correlates directly with the product cost and the product selling price, and therefore further improvements in the cell performance are required. One potential method of improving the cell performance involves developing an innovative design for the photovoltaic layer 103 that functions as the layer that converts light to electric power.
One example of a technique that involves an innovative modification of the photovoltaic layer is a technique disclosed in Patent Citation 1. Patent Citation 1 discloses a pin-type amorphous Si solar cell having a p-type layer, an i-type layer and an n-type layer formed on top of a transparent electrode, wherein the layer adjacent to the transparent electrode is formed as a 3-layer structure. Further, it is also disclosed that the middle layer of this 3-layer structure is an a-Si:H layer, and the other two layers are an a-SiC:H layer and an a-SiN:H layer respectively. Furthermore, it is also disclosed that the film thicknesses of these two other layers are set so that the layer on the i-type layer side of the center layer is thinner than the other layer. According to Patent Citation 1, using the type of structure outlined above suppresses impurity diffusion and improves the cell properties.
Further, Patent Citation 2 discloses a technique wherein when providing an i-type microcrystalline semiconductor layer on top of an n-type silicon-based semiconductor layer, the n-type silicon-based semiconductor layer is formed as a stacked structure of an n-type amorphous semiconductor layer and an n-type microcrystalline semiconductor layer. It is disclosed that forming the n-type silicon-based semiconductor layer as a 2-layer structure enables the crystallization ratio of the i-type microcrystalline semiconductor layer stacked thereon to be controlled with comparative ease.                Patent Citation 1: Japanese Unexamined Patent Application, Publication No. Hei 05-71195        Patent Citation 2: Publication of Japanese Patent No. 3,710,312        